Rice. 96
Buffer amplifier DA3 with its inputs - input 3 and input 4 - is connected to the output point of the secondary voltage channel. Together with the buffering functions, this amplifier normalizes the level of the regulated voltage, that is, it acts as a voltage divider, so that its value can be compared with the rating of the reference voltage source. Comparison of these voltage values and generation of an error signal is carried out by amplifier DA2. Error signal via decoupling diode VD 2 is supplied to one of the inputs of the comparator DA4. The second input of the comparator receives a sawtooth voltage generated by the FPN cascade. The launch of the FPN cascade (the beginning of a linear increase in voltage) and the simultaneous reset of the process of the previous period occurs at the moment the pulse front generated by the generator arrives at it. The generator produces a sequence of pulses with relatively stable frequency characteristics. This ends the work of the PWM regulator at the analog signal processing level. Further generation of the PWM signal occurs using digital methods, in which all active elements, including discrete ones from the CS, operate in key modes.
After the comparator DA4 has processed the input influences, a sequence of pulses appears at its output, synchronous with the frequency of the sawtooth voltage, but with a modulated duration of the pulse itself - a digital PWM signal. This sequence is supplied to the inputs of digital elements DD2.1, DD2.2, which perform the logical AND function (high logical level matching circuit). A sequence of pulses is supplied to the second input of each of the elements of the DD2 circuit, the frequency of which is two times lower than the original ones generated by the generator. The frequency is halved on element DD1 - the D-trigger, turned on in the mode of dividing the original frequency. The state of the trigger outputs changes when the edge of the pulse generated by the generator arrives at its counting input C. At the trigger outputs Q (direct output) and -Q (inverse output) the signals are in antiphase at each instant. When high levels of signals from the comparator and signals from the frequency divider (trigger) coincide, high-level pulses appear at the inputs of the DD2 elements and at their outputs. The periodicity of the pulses at the output of each of the DD2 elements coincides with the period of the original frequency of the generator divided by two. Graphically, the process of operation of the PWM regulator is shown in the form of diagrams in Fig. 97. The points on the diagram (Fig. 97), for which voltage diagrams are given, are marked with numbers in circles. For clarity, in the second diagram (Fig. 97) the voltage curves for points 1 (sawtooth voltage) and 2 (voltage at the output of the buffer amplifier DA1) are combined.
The operation of this PWM regulator is carried out as follows: the KS matching stage receives two time-shifted pulse sequences from each of the elements of the DD2 circuit. This is due to the specific design of the power stage of the voltage converter. The duration of the pulses in each sequence is inversely proportional to the current value of the secondary circuit voltage (at the load). The power stage of the converter is in an active state (transferring energy) to the load during the action of pulses modulated in duration on it. This is how the output voltage is adjusted to maintain its level within specified limits.
The DA1 amplifier stage is designed to disable (block) the PWM regulator circuit during a sharp increase in current consumption in the load. The inputs of the DA1 circuit are connected to a current sensor installed in the load circuit. As long as the potential difference at the DA1 inputs does not exceed a specified value, that is, the load current consumption does not go beyond the upper permissible limit, the PWM regulator operates in normal mode. When the load current increases above the set limit, the voltage at output DA1 rises to a value sufficient to open the diode VD 1. At the cathode VD 1 a positive voltage is created, closing the diode VD 2. The error signal coming from the error amplifier DA2 to the input of the comparator DA4 is shunted. The voltage set at the input of the comparator causes a sharp narrowing of the pulses coming from it to the digital circuits DD2.1 and DD2.2. The power part of the converter switches to a protected operating mode, forcibly limiting the level of energy transmitted to the CS. The PWM regulator automatically restores operation after eliminating the output overload.
TL494 push-pull half-bridge control integrated circuit pulse converter voltage.
In modern secondary power supplies (SPS), specialized integrated circuits(IC hereinafter referred to as IS).
Ideal control IC to ensure normal operation push-pull converter in PWM mode must satisfy most of the following conditions:
· operating voltage not higher than 40 V;
· presence of a highly stable thermally stabilized reference voltage source;
· presence of a sawtooth voltage generator;
· 
providing the ability to synchronize a programmable soft start with an external signal;
presence of a mismatch signal amplifier
with high common mode voltage;
· presence of a PWM comparator;
· presence of a pulse controlled trigger;
· presence of a two-channel pre-terminal cascade with short-circuit protection;
· presence of double pulse suppression logic;
· availability of means for correcting the symmetry of output voltages;
· presence of current limitation in a wide range of common-mode voltages, as well as current limitation in each period with shutdown in emergency mode;
· Availability automatic control with direct transmission;
· ensuring shutdown when the supply voltage drops;
· providing protection against overvoltage;
· ensuring compatibility with TTL/CMOS logic;
· providing remote switching on and off.
All basic transformations of PWM signals, as well as their formation, are carried out by a modulator made on a TL494 type microcircuit. There are two types of cases in which this microcircuit is produced. Power supplies typically use a plastic DIP package with 16 pins (Fig. 98). The full name of the microcircuit in such a package is TL494CN. The designation refers to a chip manufactured by Texas Instruments. Functional purpose The pins of the microcircuit are given in table. 7.
Table 7
Corresponding analogues of this microcircuit are also produced by some other companies, and each of them assigns its own brand designation. Let's give examples: FUJITSU - MB3759, SAMSUNG-KA7500, FAIRCHILD - TA494, microcircuit Russian production- KR1114EU4, SHARP company - IP3MO2. This microcircuit is designed specifically for building PWM nodes. The TL494CN chip package contains all the necessary stages.
The functional diagram of an integrated PWM converter type TL494 is shown in Fig. 99.
Items shown in functional diagram, have the following names and purposes:
· on the elements included in the unit under the general name “Generator”, the main cascade of a sawtooth voltage generator (SPG) is assembled, the time characteristics of the oscillations of which are set by external elements Rt, Ct, connected to pins 5 and 6 of DA6, and the generation frequency will be equal to
f = 1.1 / (Rt × Ct)
· the reference voltage source (pin 14) is designed to generate a stable voltage with a nominal value of +5 V, used to operate the comparison stages and generate an error voltage. The accuracy of the reference voltage is within ±5%;
element DA1 - comparator " dead zone", time interval between output pulses;
· element DA2 - comparator for comparing mismatch and sawtooth voltage signals - PWM comparator;
· operational amplifiers DA3 and DA4 – circuits for generating mismatch signals;
· elements with numbers DD1 - DD6 relate to digital automation technology and perform logical processing of the signal coming from the PWM comparator DA2;
· two transistors VT1 and VT2 are used to build amplifiers for the level and power of output pulse sequences. The collector and emitter terminals of these transistors are left unloaded to expand the possibilities for connecting them to subsequent stages;
DC voltage source rated 0.1 V D.A. 7;
· source direct current with a nominal value of 0.7 mA DA 8.
Error signal operational amplifiers have an operating input voltage range from -0.3 to 2 V. The last (highest) value corresponds to U n - the supply voltage of the microcircuit. At the input of the “dead zone” comparator, a bias is technologically installed, ensuring the guaranteed presence of a minimum pause between control pulses. Operating voltage The power supply on the chip can be set arbitrarily in the range from 7 to 40 V. The limit value of the microcircuit supply voltage and the voltage level at the collectors of the output transistors is 41V. Maximum value of collector current Ik max equal to 250 mA, recommended operating current - 200 mA, power dissipation 1W.
The operating frequency range of the sawtooth voltage generator is from 1 to 300 kHz. The capacitor connected to pin 5 of the IC chip can have any nominal value from 470 pF to 10 μF, resistors for installation in the timing circuit - in the range of 1.8-500 kOhm.
Temperature Range The operating temperature of the TL494CN type microcircuit is 0-70 °C.
The pulse converter, operating on the principle of pulse width modulation, is one of the main stages pulse source nutrition. The operating principle of the source is that the supply of all energy to the secondary power circuits depends on the PWM regulator. The correctness of its operation is determined by the parameters of stabilization of secondary stresses. It was described above (see above) general principle pulse width modulation and its use in pulsed secondary power supplies. This section will consider the practical implementation of this principle using the example of a special cascade designed to control the operation of a power source, for example, in computers. On the fragment schematic diagram shown in Fig. 100, the PWM converter stage directly includes nodes built on the following active elements:
· IC chip type TL494 - PWM converter. Circuits of passive elements connected to the microcircuit set the dynamic parameters of its operation, and are also components sensors for monitoring secondary voltage levels;
· a group of elements on transistors and a matching transformer TV 2 forms a level and power matching cascade pulse signals between the output of the PWM converter and the input circuits of the power amplifier;
· a node on other transistors is installed for a PWM regulator in order to receive signals about an uncontrolled increase or decrease in secondary voltage levels; it is also used to protect secondary circuits.
From the moment the supply voltage is applied to pin 12 relative to pin 7, the PWM regulator begins generating pulse signals at the output contacts (the terminals of the collectors and emitters of transistors VT1 and VT2). Formally, to receive pulse sequences at these pins, there are no signals feedback not required. But passive elements must be connected to the microcircuit, setting the operating parameters of the generator and providing biases at the inputs of the operational amplifiers. To observe pulses at the terminals of the output transistors, additional load resistors must be installed in the circuit, which determine the circuit for their connection.
Let's consider the circuit for switching on a PWM converter in a switching power supply control system, using the designations on the functional (Fig. 99) and circuit diagrams (Fig. 100).
When supply voltage is applied to the input of a pulsed source, the auxiliary source generates two voltages Uadd1 and Uadd2. The first is intended to power the standby channel stabilizer (if necessary), and the second is to supply a DC supply voltage to the PWM stabilizer chip. The PWM converter is powered by a voltage galvanically isolated from the primary power supply network.
The voltage supplied to pin 12 (Fig. 101) of the IC chip from the rectifier to VD 9, not stabilized and serves for the initial launch of this chip. To generate a sawtooth voltage by the internal generator of the IC chip, a resistor R28 with a nominal resistance value of, for example, 12 kOhm is connected between its pin 6 and the common wire of the secondary voltage, and a capacitor C18 with a capacity of, for example, 1500 pF is connected between the common wire and pin IC 5 (Fig. 100). According to the service documentation for the TL494 chip, the calculation of the generation frequency, in relation to the elements of this circuit diagram, can be made using the following formula:
With the indicated values of the elements of the RC chain, the operating frequency of the generator is ~55.5 kHz. Internal generator generates a signal with increasing voltage, the shape of which is shown in the upper diagram in Fig. 101.
According to the technical documentation for the TL494 chip, the voltage rise reaches the level of +3.2 V, after which the capacitor is discharged and the sawtooth voltage U 5 on it abruptly drops to zero. Then the process is repeated cyclically (see diagrams in Fig. 101). The appearance of the signals is qualitative in nature and does not reflect real time and amplitude relationships.
A sawtooth voltage is supplied to the inverting inputs of the “dead zone” comparator - element DA1 and the PWM comparator - element DA2. An internal source of initial bias is connected to the second input of the comparator, the value of which is set and is U 4 = 100 mV.
In diagram 1 fig. 101 the presence of this source is conventionally depicted by a straight line intersecting the “teeth” of the sawtooth voltage. The comparator is a threshold device, so its output generates a signal whose values take only two states. If the voltage at the inverting input exceeds the voltage level at the non-inverting input, then the output of the comparator is set to a low voltage, in this case zero. And vice versa, if the voltage at the inverting input is less than at the non-inverting input, then the output voltage takes on a high level value, close to the supply level. In our case, when the initial bias voltage at the non-inverting input of comparator DA1 is greater than the voltage of the sawtooth generator applied to the second input, the output voltage (Diagram 2 in Fig. 101) has a high level. Discrete cascade elements with only positive supply voltage are connected to the input of IC 4. The 100 mV offset on the non-inverting input of DA1 is minimal, and increasing the voltage on IC 4 can only increase it. Therefore, we can conclude that the duration of the pulses generated at the output of DA1, at a given initial bias, has a minimum value and with increasing voltage at the IC 4 pin, the duration of the pulses of positive polarity will only increase. The impact this property has on the operation of the entire control circuit will be discussed below. A periodic sequence of pulses from the output of comparator DA1 is supplied to a digital OR-type logic element - DD1. The pulse repetition rate is determined by the time characteristics of the sawtooth voltage.
In diagram 3 Fig. Figure 101 shows a sawtooth voltage and feedback voltage U 3, which can change depending on the action of destabilizing factors (Fig. 100).
The error amplifier on element DA3 compares the feedback voltage and the reference voltage, the level of the latter is determined by the ratio of resistors R23 and R24 connected between pin IC 14 and the common wire. 100. The internal stage of the IC circuit generates a stable voltage at the IC 14 pin with a nominal value of +5 V. Resistors R23 and R24 form a voltage divider, the middle point of which is connected through the IC 2 pin to the inverting input of the operational amplifier DA3. The non-inverting input DA3 through two resistors R29 and R30 receives voltage from the outputs of the secondary voltage channels with a value of, for example, +5 V. The input of IC 1 is connected through a resistor R25 to the common secondary power wire. The resistance values of resistors R25 and R29, R30, forming the divider, are selected in such a way that at the nominal values of the output secondary voltages at the IC 1 pin, the voltage is set just below the value of +2.5 V. This creates some initial differential bias at the DA3 inputs. The DA3 amplifier operates in linear mode; the gain parameters are determined by the internal circuitry of this stage. DA3 is powered only from an internal source with positive value voltage. Therefore, a change in the output voltage on DA3 can only occur in the positive region. To fulfill this condition, the voltage at the IC 1 pin should not exceed +2.5 V. Exceeding this threshold will result in the voltage at the DA3 output being set to zero. Further we will assume that this does not happen, and the circuit operates within a certain range specified for the control zone.
So, the voltage at the input of IC 2 is constant, and the feedback voltage is supplied to the input of IC 1 from the load, which has a deviation determined by disturbing factors. At the output of the DA3 amplifier, a mismatch, or error, signal is generated, the accuracy of which is determined by the stability parameters of the internal reference voltage source of the IC chip. It is clear that all its deviations from the nominal value will be transmitted to IC 2. The output of DA3 is connected to the non-inverting input of the PWM comparator - DA2, and a sawtooth voltage from the generator is supplied to its second input. The shapes of various signals at the DA2 inputs are shown in diagram 3 shown in Fig. 101. The line crossing the “saw” shows the voltage at the non-inverting input of DA2. Appearance The resulting signal at the DA2 output is presented in diagram 4 (see Fig. 101). It can be seen that pulses of positive polarity are formed here in the case when the voltage level supplied from the DA3 output exceeds the level of the linearly increasing voltage at the inverting input DA2. Diagram 4 shows how the duration of positive pulses and, accordingly, the pause between them changes depending on the voltage shape at the DA3 output. The duration of the positive pulse increases as the level at the DA3 output increases, that is, the pulse duration is directly proportional to the voltage level at the output of the error amplifier.
A sequence of pulses is supplied to the second input of the digital element DD1, the first input of which receives a pulse signal from the output of DA1 - the “dead zone” comparator.
The elements of the IC chip, the operation of which is described above, are included in the analog part of signal processing and generation. It should be noted that comparators occupy a borderline position here. Receiving analog signals at the inputs, they form a two-level signal at the outputs. The components are the same letter designation DD refers to exclusively digital automation elements that work with discrete signals at both inputs and outputs. Signals have only two levels. In positive logic (we will continue to adhere to this terminology), a logical unit is usually considered to be a voltage value close to the positive supply level. Logic zero level is a low level close to the common wire potential.
The output state of the DD1 element, logical OR, takes on the value of a logical one if and only if the signal at at least one (arbitrary) of its inputs also has a high logical level. The output is considered to be in a low-level state when all inputs of the OR logic element are also supplied with low-level voltages.
The type of pulse output signals of element DD1 is presented in diagram 5. The sequence obtained at the output of DD1 is the basis for the formation of the final control action on power elements power amplifier. All timing relationships of the final signal are already embedded in this initial sequence. The output of DD1 is connected to the counting input C of the dynamic trigger - DD2, as well as to one of the inputs of each of the logic elements DD5 and DD6.
The state of the outputs of a dynamic trigger changes with the arrival of a positive pulse edge at its counting input. At this moment, the state of the information input, pin D, is “rewritten” (repeated) to the direct output of the trigger - pin Q. The output (-Q) always has a state opposite to Q (diagrams 6 and 7).
The functional diagram presented in Fig. 99 shows that the dynamic trigger DD2 (D-trigger) has an inverse output connected to the information input - D. This connection of the trigger sets it in the mode of dividing the frequency of the pulse sequence arriving at the counting input by two . The trigger is triggered, that is, a change in the state of its paraphase outputs, occurs only at the moment the positive edge of the pulse arrives at input C. At this time, each of its outputs changes its state to the opposite. Pins Q and D are connected to each other, so any change in the state of output Q is transmitted to input D. As a result, each edge arriving at input C rewrites the changed level of input D to the outputs. Between the arrival of two edges, the state of the trigger outputs remains stable, as shown in diagrams 7 and 6 (see Fig. 101). Diagram 7 corresponds to the state of the direct output of the trigger - pin Q, and diagram 6 corresponds to the change in the state of the inverse output - pin (-Q). The trigger switches on the positive edges of the sequence in diagram 4.
The process of digitally dividing the original frequency by two has important feature: regardless of the type (temporal relationships of pulses and pauses) of the input pulse signal, in the sequence obtained as a result of division, the durations of pulses and pauses will be equal (see diagrams 7 and 6 in Fig. 101).
The Q output of trigger DD2 is connected to one of the inputs of the DD3 element, and the inverse output (-Q) is connected to one of the inputs of the DD4 logic element. Two-input elements DD3 and DD4 perform the logical AND function. Elements of this type generate high logical level signals at the output pins in the case when all their inputs also have high levels. For any other combination of logical levels at the inputs of the AND element, its output will remain low. All inputs of a logic element have the same impact on the formation of the output signal, that is, they are equal. If a high logical level is constantly applied to one of the inputs, then it will be permissive and will not affect the passage of the signal from the second input through the element. Or else, all changes in the signal set at the second input will be exactly repeated at the output.
In Fig. 100, the output of microcircuit IC 13 is connected to one of the inputs of elements DD3 and DD4 and can be used to block pulse signals arriving at elements DD3 and DD4 from the outputs of trigger DD2. Blocking is carried out by applying a low logic level signal to this pin. In this circuit diagram, Fig. 100. pin IC 13 is permanently connected to IC 14 - the output of the internal reference voltage source. This potential is a constant enabler for sequences to pass from the flip-flop outputs to the outputs DD3 and DD4. Consequently, the voltage form at the inputs and outputs of elements DD3 and DD4, respectively, will be identical (diagrams 9 and 8, fig.101) In this case, these elements perform the functions of buffer elements and repeaters.
The last elements installed in the PWM signal generation circuit are two-input elements DD5 and DD6. One input of these elements is connected to DD3 and DD4, respectively, and the other pair of inputs of elements DD5 and DD6 are combined with each other and connected to the output of DD1. Elements DD5 and DD6 are used to execute a logical function of the NOR type. These elements perform a logical operation similar to DD1, but also add negation, which in digital technology is equivalent to inversion. A low level signal appears at the output of the NOR logic element when at least one of its inputs is set to a high level voltage. If for a two-input OR element (OR-NOT) some abstract difference is introduced between the inputs and one is considered as informational, and the second as permissive, then we can conclude that in order for data to pass from the first input to the output of the element, there must be permission at the input The voltage level is set to low. When a high level is applied to the enable input, information is blocked, and the output is always low. This is true for the operating logic of an OR-NOT element.
At the input of DD5 there are signals coming from the outputs of DD1 (see diagram 4 in Fig. 101 and DD3 (see diagram 7). As a result of the logical addition of these input influences with inversion, the signal shown in diagram 8 appears at the output of element DD5. Similarly Diagram 9 shows the shape of the pulses received at the output of element DD6. Pulses of positive polarity are supplied to outputs DD5 and DD6 when both input signals for each of these elements take a low level value.
From diagrams 4, 8 and 9 it is clear that the outputs of the elements are DD5. and DD6, alternating pulses of the sequence of diagram 4 appear. Working pulses in diagram 4 will be considered time intervals, the boundaries of which are delineated by the decline and the front, that is, the beginning of the pulse is the decline of the positive voltage, and its end is the positive edge. One pulse from the output of DD1 goes to the output of element DD5, and the input signal to DD6 is blocked at this moment high level, supplied from the inverting output of trigger DD2. The next pulse from the sequence at the output of DD1 appears at the output of DD6, and in DD5 it is blocked by a high level coming from the direct output of the trigger DD2. At the output of each of the logic elements DD5 and DD6, pulses appear in turn from the sequence formed at the output of DD1.
Two sequences of pulses are generated at outputs DD5 and DD6. The pulse repetition rate in each of them is two times lower than the frequency of the sawtooth voltage on capacitor C18. The positive polarity pulses of the two sequences are spaced apart in time, that is, their action intervals do not intersect. Next, each sequence is used to control its own transistor of a half-bridge switching power amplifier. Quite important is the issue of correct formation of pulse sequences for excitation transistor circuit power amplifier, it is therefore necessary to consider some edge cases of the operation of the power supply circuit and the response of the IC elements to them.
The temporal position of the pulses is strictly determined by the shape of the sawtooth voltage. The pulse declines in each of the sequences are synchronized with the declines of the linearly increasing voltage generated by the microcircuit generator. The temporal position of the decline does not change. If we consider diagram 3, we can note that the position of the decay of the pulse generated by the PWM comparator (see diagram 4) depends on the current ratio of the “saw” voltage values and the mismatch voltage. A decrease in the mismatch voltage level in diagram 4 causes a “shift” of the onset of the pulse to the left. The position of the front of this pulse, that is, its end, is strictly determined by the moment of decay of the sawtooth voltage, therefore, its duration increases. The frequency of the pulses does not change, and their duration is controlled by the output level of the error amplifier DA3.
At the beginning of the description of the operation of the PWM converter, the so-called “dead zone” comparator was mentioned (see diagrams 1 and 2). Now that it has become clear general mechanism operation of the entire pulse-width modulator circuit, the need for its presence in circuits of this type should be explained.
Element DD1 performs logical addition of pulse signals from comparators DA1 and DA2. Previously, it was assumed that the positive pulse of the comparator DA2 has a larger width than the similar output pulse from DA1. However, if the process of narrowing the pulse from DA2 begins, then when zero level signal from DA1, in the extreme case, a constant low level will be established at the output of DD1. Trigger DD2 will not be able to switch its outputs, and permanent opposite logical levels will appear on DD5 and DD6. This will stop the switching process of the power stage transistors. To protect against similar situation The “dead zone” comparator is intended. When the pulse from DA2 is narrowed, a moment comes when the duration of the positive pulse from DA1 becomes determining when adding the signals arriving at the inputs of DD1. The positive pulse at output DD1 cannot be narrower than the output pulse of the “dead zone” comparator. If you trace the behavior of the digital part of the circuit in this case, you will see that as a result of transformations, sequences of positive pulses will appear at outputs DD5 and DD6, the duration of which will coincide with pauses (logical zeros) in diagram 2. The pause between these pulses will be equal to the duration of positive pulses in diagram 2. This means that the node on the comparator “dead zone” is guaranteed to ensure the appearance of a sequence converter in the output stages of the PWM pulses with specified pause intervals between pulses. This mechanism of action allows you to increase the supply of energy to the secondary circuit and resume the PWM control process using the DA3 amplifier and the DA2 comparator. The pause formed due to the presence of a 100 mV source at the DA1 input eliminates the appearance of through currents in power transistors of a power amplifier.
The appearance of pulse signals at the outputs of elements DD5 and DD6 ends the logical processing of the mismatch signal and the formation of PWM sequences in the converter. The appearance of these pulse sequences will remain unchanged until they are applied to the power elements of the power amplifier. All stages installed between the outputs of elements DD5, DD6 and the base circuits of the power amplifier transistors are intended only to increase the energy characteristics of control pulses and match their levels.
Internal transistors VT1 and VT2 of the IC chip are used for primary amplification of control sequences of pulses that are supplied to their bases (see diagrams 10 and 11, Fig. 101) from elements DD5 and DD6. The terminals of these transistors do not have internal connections to any load resistive circuits. They are specifically left free for the use of transistors in various options switching circuits.
Direct connection of the output transistors of the TL494 chip to a power transformer is rarely used. Usually an intermediate amplification stage is used, built on transistors, for example, type 2SC945. In this case, the emitters of transistors VT1 and VT2 of the microcircuit (9,10) are connected to each other, and their collectors (8 and 11) have a transformer connection with the power amplifier. This is a traditional approach to the formation of matching circuits for a low-voltage, relatively low-power control unit and a high-voltage power stage. The implementation of this approach comes down to the following. Rectangular voltage pulses (see diagrams 12,13, Fig. 101) on the collectors of transistors VT1 and VT2 are supplied to the bases of two transistors (they are not shown in Fig. 100), the collectors and emitters of which are connected to the primary winding (circuit with a midpoint ) low-power matching high-frequency transformer TV2. Rectangular voltage pulses from the secondary winding of this transformer are supplied to the input of powerful transistors included in the primary winding of power transformer TV1 (circuit with a midpoint), from the secondary winding of which the voltage(s) is supplied through the rectifier(s) and smoothing ( f) filter(s) to consumers of electrical energy.
Thus, the considered cascade serves to amplify the level and power of IC pulse signals (diagrams 12,13, Fig. 101), to a level sufficient to start a half-bridge (or made according to another circuit) amplifier and maintain the voltage at consumers within the specified range action of disturbing factors.
In pulsed power transformers, transistors of the 2SC945 type or their functional analogues are often included in the primary winding of the power transformer TV1. They are used very widely, regardless of the manufacturer of the product. Limit values main technical parameters the specified transistors are as follows:
· maximum dissipation power – 250 mW;
· collector-base voltage – 60 V;
· collector-emitter voltage – 50 V;
· emitter-base voltage – 5 V;
· collector current – 100 mA;
· base current – 20 mA;
· typical gain value in a circuit with a common emitter is 185-200;
· typical capacitance of the collector-base junction – 3 pF;
· typical value of unity gain frequency f t – 250 MHz.
According to the domestic classification, they belong to the family of transistors high frequency and low power.
Rice. 40
Rice. 39
Rice. 38
Rice. 37
Note - more details about the microcircuit itself and the principle of its operation are shown further in paragraph 2.4.2. - PWM controller on IC TL494.
Switching voltage stabilizers based on IC TL494.
Ramp voltage is often obtained from a separate device - a ramp voltage generator (RVG).
The frequency of the sawtooth voltage is determined by R.C. chain and usually f gpn = const, but, if necessary, changing the parameters R.C. you can set (adjust) the required frequency.
It is known that the switching frequency of the switching device - transistors VT 2, VT 3 in the ISN with PWM is constant (it is set by the GPG). Under the influence of destabilizing factors, the voltage on the external resistor changes R 9 and, accordingly, at the output of the differential amplifier U pt, which leads to a change in duration open state transistors VT 2, VT 3 regulators, and the voltage at the output of the pulse stabilizer remains unchanged.
3.7.3 TL494 series PWM controllers
Currently, microcircuits (domestic and imported) are widely represented on the market, which implement a different set of PWM control functions for specific tasks. PWM controllers of the TL494 series (domestic analogue of KR1114EU4) have proven themselves well. Their detailed description given in . These microcircuits provide expanded capabilities in the development of electrical power supply systems and implement a full set of PWM control functions. The microcircuit generates a reference voltage, amplifying the error signal, generating a sawtooth voltage, PWM modulation, generating a push-pull output, protection against through currents and overloads, external synchronization, wide range adjustment, provides soft start and the possibility of external activation.
main parameters and characteristics of the TL494 chip:
· supply voltage Uсс – 7…40 V;
voltage on closed collectors key transistors no more than 40 V;
· current of output key transistors – 250 mA;
· reference voltage – 5 V ± 5%;
· general power dissipation in continuous mode (case DIP-16.T a<25 ºС) – не более 1000 мВт;
operating ambient temperature range:
· with suffix L – from −25…+85 ºС;
· with suffix C – from 0…+70 ºС.
· current through the feedback output – no more than 0.3 mA;
· capacity of the timing capacitor St – 0.047…10000 nF;
· resistance of the timing resistor – 1.8..500 kOhm;
· generator frequency – 1…300 kHz;
· current consumption of the microcircuit – no more than 20 mA;
· front of the output current pulse – no more than 200 ns;
· output current pulse decline – no more than 100 ns.
In addition, the independent transistor output drivers of the microcircuit provide the ability to operate the output stage using a common emitter circuit or an emitter follower circuit.
3.1.1. Schematic diagram of a pulse step-down
stabilizer on IC TL494
In the offered on rice. 37 stabilizer, the maximum input voltage is 30 V, it is limited by the maximum permissible drain-source voltage of the p-channel field-effect transistor VT 1 RFP60P03 from Mitsubishi Electric. Resistor R 3 and capacitor WITH 6 set the frequency of the internal sawtooth voltage generator, it is determined by the formula
On rice. 37 stated: VD 1-KD212A; VD 2-2D2998B; VT 1-RFP60PO3; C 1, C2-2200 μ×40 V; C 3-10 μ×63V; C 4-0.1 micron; C 5-1000 μ×25V; C 6-4700;C 7-0.1 microns; F.U. 1-MF R400; R 1-200 Ohm, 0.125 W; R 2-510 Ohm, 0.5 W; R 3-30 kOhm, 0.125 W; R 4-1 M, 0.125 W; R 5-47 kOhm, 0.125 W; R 6-4.7 kOhm, 0.125 W; R 7-4.7 kOhm; R 8-5.6 kOhm, 0.125 W; R 9-1 kOhm, 0.125 W; L 1-80 µH; I-6 A; Uin =24 V; Uout =0…11 V.
From the reference voltage source (pin 14) through a resistive divider R 6, R 7, part of the reference voltage is supplied to the inverting input of error amplifier No. 1 (pin 2). Feedback signal via divider R 8, R 9 is supplied to the non-inverting input of the error amplifier (pin 1) of the microcircuit. Output voltage is regulated by resistor R 7. Resistor R 5 and capacitor WITH 7 perform frequency correction of the error amplifier.
It should be noted that independent The output drivers of the microcircuit ensure operation of the output stage in both push-pull and single-cycle modes. In the stabilizer, the output driver of the microcircuit is switched on in single-cycle mode. To do this, pin 13 is connected to a common wire. Two output transistors (collectors - pins 8, 11; respectively, emitters - pins 9, 10) are connected according to a common emitter circuit and operate in parallel. In this case, the output frequency is equal to the generator frequency. The output stage of the microcircuit through a resistive divider R 1, R 2 controls the key element of the FE stabilizer - a field-effect transistor VT 1. In the power circuit of the microcircuit (pin 12). To suppress various high-frequency interference and more stable operation of the stabilizer as a whole, it is turned on L.C.-filter on elements L 1, C 3, C 4. As can be seen from the circuit diagram of the stabilizer, when using the TL494 chip, a relatively small number of external elements are required.
A self-resetting fuse is used to protect the stabilizer from overcurrent F.U. 1 MF-R400 from Bourns. The operating principle of such fuses is based on the property of sharply increasing their resistance when a certain threshold value of current or ambient temperature is exceeded and automatically restoring their properties when these causes are eliminated. Below are the technical specifications of the above fuse:
· maximum operating voltage – 30 V;
· maximum current that does not lead to changes in fuse parameters – 4 A;
· current that leads to a jump in resistance – 8 A;
· operating temperature range – from −40 to +85 ºС.
It was possible to reduce switching losses and increase the efficiency of the stabilizer thanks to the use of a Schottky diode ( VD 2) KD2998B with parameters:
· constant forward voltage – 0.54 V;
· average forward current – 30 A;
· frequency range without reduction of electrical parameters – 10..200 kHz;
· pulse reverse voltage – 30 V.
Main technical characteristics of the step-down stabilizer (Fig. 37)
· Input voltage – 24 V;
· Output voltage – 0…11 V;
· Maximum load current – 6 A;
· Output voltage ripple amplitude – no more than 100 mV;
· Output instability when changing load current and ambient temperature – no more than 1%;
· The average efficiency value at maximum load current over the entire output voltage range is about 90%;
It was experimentally established that the stabilizer has maximum efficiency (≈90%) at a frequency of 12 kHz, but at an output power of about 40 W a barely noticeable whistle is observed. The whistle disappears if you increase the conversion frequency to 20 kHz (with a decrease in efficiency by 2...3%). The efficiency at output power up to 10 W (U out = 10 V) reaches 93%.
Inductor L2 is wound on two MP-140 K24×13×6.5 ring magnetic cores folded together and contains 45 turns of PETV-2 wire with a diameter of 1.1 mm, laid evenly in two layers around the entire perimeter of the ring. Between the layers, two layers of varnished fabric LShMS-105-0.06 GOST 2214-78 should be laid. The inductance of the choke is 220 µH. Resistors – C2-33N. Capacitors WITH 1, WITH 2, WITH 3, WITH 5 – K50-35, WITH 4, WITH 6, WITH 7 – K10-17. Variable resistors - SP5-3 or SP5-2VA. The TL494CN chip can be replaced with a TL494LN or KR1114EU4. Throttle L 1 – DM-0.1 with inductance 80 μH. The MF-R series self-resetting fuse can be selected for each specific case. Diode VD 2 can be replaced with any other Schottky diode with parameters no worse than the above, for example 20TQ045.
In the stabilizer, the overcurrent protection unit can be designed differently. The TL494 has error amplifier #2 (inverting I/O 15, non-inverting I/O 16). The outputs of both error amplifiers are active high and ORed at the non-inverting input of the PWM comparator. In this configuration, the amplifier that requires the least amount of time to turn on the output is the dominant amplifier in the gain loop.
A fragment of the stabilizer circuit with an overcurrent protection unit is shown in rice. 38 .
Parallel resistors R 12-R 14 acting as a current sensor are connected in series with the load. The voltage from the current sensor is supplied to the non-inverting input (pin 16) of error amplifier No. 2. The threshold current value (voltage at the inverting input of the amplifier, pin 15) in the load is set by the divider R 10, R 11.
On rice. 38 stated: VD 2-2D2998B; C 5-1000 μ×25V; C 6-4700;C 7-0.1 microns; R 3-30 kOhm, 0.125 W; R 4-1 M, 0.125 W; R 5-47 kOhm, 0.125 W; R 6-4.7 kOhm, 0.125 W; R 7-4.7 kOhm; R 8-5.6 kOhm, 0.125 W; R 9-1 kOhm, 0.125 W; R 10-4.7 kOhm, 0.125 W; R 11-270 Ohm; R 12, R 13, R 14-0.1 kOhm, 1 W; L 1-80 µH; I-6 A; Uout = 0…11 V.
As soon as the current in the load exceeds the set threshold value and the error amplifier No. 2 of the microcircuit becomes dominant in the control loop, the stabilizer will begin to operate in current stabilization mode. If the load current is less than the threshold value, the stabilizer will again switch to voltage stabilization mode. To reduce power losses, the current sensor is made with a minimum resistance of 0.03 Ohm: at a maximum load current of 6 A, the power dissipation on the sensor
is only 1.08 W. Resistors R 12...R 14 – type S5-16MV 1 W, 0.1 Ohm ± 1%. Resistor R 11 – SP5-3 or SP5-2VA. If necessary, to reduce losses, you can further reduce the resistance of the current sensor.
The stabilizer is made on a board with dimensions of 55x55 mm. During installation, it is advisable to separate the common wire of the power part of the stabilizer and the common wire of the microcircuit and connect them at the output of the stabilizer, as well as minimize the length of the conductors (especially the power part).
The transistor is installed on a radiator with an effective surface area of at least 110 cm2. The stabilizer does not require adjustment if installed correctly. In a stabilizer with an overcurrent protection unit (Fig. 38), it is necessary to set the voltage at pin 15 of the microcircuit, which is calculated by the formula: U 15 = I × R, where I is the maximum load current; R– resistance of the current sensor.
Initially without resistor load R 11 it is necessary to set the required voltage U for maximum load current (for current Ipore = 8 A, U = 0.24 V). It is better to turn on the first time with a load of 0.2...0.4 A. Then slowly increase the output voltage to the maximum value and then, increasing the load current, check the transition of the stabilizer to current stabilization mode.
Instead of the RFP60P03 transistor, you can use the cheaper RFP10P03, but the use of a cheaper element base may lead to a deterioration in the technical characteristics of the stabilizer.
3.1.2. Schematic diagram of a pulse boost
stabilizer on IC TL494
In some cases, it is necessary that the output voltage of the stabilizer be higher than the input. On rice. 39 The block diagram of a boost-type parallel pulse stabilizer is shown.
In this pulse stabilizer, when the key element of the FE is open, the current from the source U input flows through the throttle L 1, storing energy in it. Diode VD 1 is closed. Current to the load during this period of time comes only from the capacitor WITH 1 .
On rice. 39 stated: VD 1-KD212A; VD 2-2D2998B; VT 1-IRFP540; C 1, C2-2200 μ×40 V; C 3-10 μ×63V; C 4-0.1 micron; C 5, C 6-3300 μ×63 V; C 7-4700; WITH 8-0.1 microns; WITH 9-1000 μ×25 V; F.U. 1-MF R400; R 1-1 kOhm, 0.25 W; R 2-750 Ohm, 0.25 W; R 3-30 kOhm, 0.125 W; R 4-1 M, 0.125 W; R 5-47 kOhm, 0.125 W; R 6-4.7 kOhm, 0.125 W; R 7-4.7 kOhm; R 8-150 kOhm, 0.125 W; R 9-4.7 kOhm, 0.125 W; L 1-80 µH; I-1.4 A; Uin =24 V; U out =26.5…50 V.
At the next moment, when the CE closes, the inductor energy L 1 is given to the load. In this case, the output voltage will be greater than the input voltage. Unlike a buck stabilizer ( rice. 38 ) here the inductor is not a filter element, and the output voltage becomes greater than the input voltage by an amount determined by the inductance of the inductor L 1 and the duty cycle of the key element of the FE.
In the stabilizer on rice. 39 Basically, the same radioelements are used as in the previously discussed one.
Main technical characteristics of the boost stabilizer:
· Input voltage – 24 V;
· Output voltage – 26.5…50 V;
· Maximum load current (at U out = 50 V) – 1.4 A;
· Output voltage ripple amplitude – no more than 200 mV;
· Output instability when changing load current and ambient temperature – 1.5%;
· The average efficiency value at maximum load current over the entire output voltage range is about 9.2%;
· Conversion frequency – 15 kHz;
· Operating temperature range – from −25 to +85 ºС;
· The ripple amplitude of the output voltage of the stabilizer at maximum load is about 200 mV.
You can reduce ripple by increasing the capacitance of the output filter. For a “softer” start, a capacitor is connected between the common wire and the non-inverting input of error amplifier No. 1 (pin 1) WITH 9. To protect the stabilizer from overcurrent, you can use the functional unit shown in Fig. 38.
Throttle L 2 is the same as in the step-down stabilizer circuit, VT 1 – n-channel field-effect transistor IRF540 with parameters: Usi = 100 V, Ic = 28 A, Rsi = 0.077 Ohm (maximum values). Resistors – C2-33N. Capacitors WITH 1, WITH 2, WITH 3, WITH 5, WITH 6, WITH 8, WITH 9 – K50-35; WITH 4, WITH 7, WITH 8 – K10-17. Variable resistors - SP5-3 or SP5-2VA. Transistor VT 1 should be installed on a radiator with an effective surface area of at least 100 cm2. You can use a cheaper n-channel field-effect transistor, of course, with some deterioration in the technical characteristics of the stabilizer. It is better to turn it on for the first time with a small load of 0.1...0.2 A and a minimum output voltage, then slowly increase the output voltage and load current to maximum values.
If the step-up and step-down stabilizers operate from the same voltage source, then their conversion frequency can be synchronized. Shown is a synchronization diagram for two TL494 microcircuits. To do this, you need to remove the timing resistors and capacitor in the slave stabilizer and short-circuit terminals 6 and 14 of the microcircuit, and connect terminals 5 of the microcircuits of both stabilizers to each other.
In a boost-type stabilizer, the choke L 2 does not participate in smoothing the ripple of the output DC voltage. In boost-type stabilizers, for high-quality filtering of the output DC voltage, it is necessary to use output filters with sufficiently large values L And WITH. This leads to an increase in the weight and dimensions of the filter and the device as a whole. Therefore, the power density of a step-down stabilizer is greater than that of a step-up stabilizer.
3.1.3. Schematic diagram of a pulse
inverting stabilizer on IC TL494
The schematic diagram of a pulse inverting stabilizer is shown in rice. 40. This ISN is made according to the diagram given in chapter 2, §2.2.3.
Also, as in a step-up stabilizer, the inductor, when the CE is open, accumulates energy, and when closed, it transfers it to the load, however, due to a different order of connecting the elements, the stabilizer has the property of inverting the polarity of the output voltage relative to the input voltage.
On rice. 40 stated: VD 1-KD212A; VD 2-2D2998B; VT 1-RFP60PO3; C 1, C2-2200 μ×40 V; C 3-10 μ×63V; C 4-0.1 micron; C 5-1000 μ×25V; C 6-4700;C 7-220 μx40 V; WITH 8-0.1 microns; F.U. 1-MF R400; R 1-200 Ohm, 0.125 W; R 2-510 Ohm, 0.5 W; R 3-1 kOhm, 0.125 W; R 4-4.7 kOhm, 0.125 W; R 5-30 kOhm, 0.125 W; R 6-1 MOhm, 0.125 W; R 7-47 kOhm; R 8-1 kOhm, 0.125 W; R 9-10 kOhm, 0.125 W; R 10-1 kOhm, 0.125 W; R 11-5.6 kOhm, 0.125 W; L 1-80 µH; I-4.5 A; U input = 24 V; Uout =0…11 V.
The inverting stabilizer uses basically the same electronic components as those previously described.
Main technical characteristics of the inverting stabilizer:
· Input voltage – 24 V;
· Output voltage – 11 V;
· Maximum load current – 4.5 A;
· Output voltage ripple amplitude – no more than 150 mV;
· Output instability when changing load current and ambient temperature – 15%;
· The average efficiency value at maximum load current over the entire output voltage range is 80%;
· Conversion frequency – 15 kHz;
· Operating temperature range – from −25 to +85 ºС.
In order to eliminate the input current surge, especially when operating at a heavy load, the stabilizer implements a “soft” start due to the introduction R 3 and WITH 5.
Transistor VT 1 should be installed on a radiator with an effective surface area of at least 140 cm2. Diode VD 2 is also installed on a radiator with an effective surface area of at least 10 cm2.
The input voltage of the stabilizers can be reduced or increased if all the above requirements for each stabilizer are taken into account, but the current divider must be calculated again R 1, R 2, so that the divider current and the source-gate voltage of the transistor VT 1 have not changed.?????
The KR142EP1 pulse control chip ensures operation of the ISN mainly in a relay on-off mode, but the IC also provides the ability to create a voltage stabilizer with pulse-width modulation.
For example, if for one reason or another it is required that the operation of the threshold device be synchronized with the frequency of some external device, then its synchronizing signal is supplied to the pin. 14 and 15 IS. Often, a rectangular pulse generator - a master oscillator - is used as such a device. The rectangular alternating voltage of such a generator using a differentiating R.C. chain is converted to sawtooth voltage U drank. In this case, the resistor is used R 10 microcircuits, and an external capacitor of small capacity is used.
Diodes are used as the input node for this signal VD 3...VD 6 connected between the differential amplifier and the Schmitt trigger. Thus, on the resistor R 10, two voltages are compared - the first is proportional to the change in voltage across the load (as in the ISN with RE) and it is removed from the collector VT 11 DC differential amplifier U pt, and the second is the sawtooth voltage U drank. As a result of comparing these voltages, an error signal is isolated, which is supplied to the inverting stage VT 7.
The sawtooth voltage must have a swing sufficient to transfer VT 7 to saturation state. The latter, when open, operates in a mode close to saturation. Delay of moments in time at which VT 7 comes out of saturation, relative to the leading edge of the sawtooth voltage depends on how open the transistors are VT 7,VT 8. If the transistors are almost off, and the average voltage between their base and emitter, given by the collector potential VT 8 is small, then it will become equal to the linearly decreasing voltage at the rectifier output only at the end of the cycle.
As the potential on the collector increases VT 11 (i.e., as the voltage across the load increases), the voltage also increases U upt. This voltage corresponds to a large pause between voltage pulses (shorter duration of voltage pulses) removed from the common emitter load of the transistors VT 7,VT 8 - R 9(U B VT 6) microcircuits.
Transistors VT 6, VT 5, VT 4 are amplifiers of pulses taken from a resistor R 9. Amplified pulses from the collector VT 4 via an external voltage divider ( R 6, R 3) fed to the base VT 3, which is one of the transistors of the switch included in the IC. This key ( VT 2, VT 3) controls the ISN in this circuit with an external power switch, also made in the form of a composite transistor ( VT 2, VT 3). Thus, when increasing, for example, the supply voltage at the input of the ISN, the voltage U n = (t And /T)U n on the load will remain unchanged since the open state time of the control transistor of the power section has decreased.
Miracles of Altai. People are so carried away by foreign resorts that they forget that our country is much larger than the whole of Europe. For example, the territory of the Altai Mountains, whose area is 9.2 thousand km2, can accommodate ten Great Britains. And only 200 thousand people live on its territory. So it turns out that this is the best place for secrets and riddles. And if you want to touch ancient history and get acquainted with a real secret, then this is the place for you. Valley of the Dead. History and a large amount of free space have allowed amazing monuments to be preserved. For example, in the Chemal region there is a whole “valley of the dead”. The banks of the Katun River and its tributaries are dotted with thousands of Scythian mounds, most of which have not yet been excavated. It's an amazing sight. But modernity interferes even in seemingly inviolable places. In the near future, it is planned to resume construction of the Katunskaya HPP. The resulting reservoir threatens to flood a significant number of mounds, so now Russian and Altai archaeologists are trying to speed up their work. The oversaturation of graves gives rise to numerous guesses as to why there were so many of them in Altai. According to one of them, this land was the ancestral home of all humanity. More modest scientists agree that Altai is the ancestral home of the Indo-European race. There is a version that here was the center of the powerful Scythian empire, whose borders reached the Danube. Many artifacts of the famous Scythian “animal style” dating back to the 13th century BC are actually found here. – 3rd century AD They say that the sacred land of Altai magically did not let go of its sons, and they, subject to its spell, brought the dead (wherever death overtook them) right here, to their historical homeland. Chudi. There are ghost mountain people. Chudi. They lived a long time ago and came from the Emond steppe. They were the masters of Altai. Their disappearance has something to do with the color white. One theory somehow binds the white birch tree. Roerich's theory says that the disappearance of this people is associated with the appearance of white people. Allegedly, the miracles refused to obey. Nevertheless, the Chuds disappeared and disappeared in a very interesting way - they dug themselves in: The Chuds dug large holes, made a flooring of earth supported by wooden posts, went in there with the whole tribe and brought down the “roof” on themselves. At the site of these self-burials, conical pits are formed over time, into which people sometimes fall. There is a hypothesis that in this way the Chuds tried to move to another, parallel world. And they succeeded. There are people (mountaineers, rock climbers) who claim that they saw certain creatures similar to people who came out of the rocks and went back in. Although, these visions could be the result of altitude sickness.
